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| Philips Semiconductors Objective specification PowerMOS transistors Low capacitance Avalanche energy rated FEATURES * Repetitive Avalanche Rated * Fast switching * Low feedback capacitance * Stable off-state characteristics * High thermal cycling performance * Low thermal resistance PHX6NA60E SYMBOL d QUICK REFERENCE DATA VDSS = 600 V g ID = 3.9 A RDS(ON) 1.2 s GENERAL DESCRIPTION N-channel, enhancement mode field-effect power transistor, intended for use in off-line switched mode power supplies, T.V. and computer monitor power supplies, d.c. to d.c. converters, motor control circuits and general purpose switching applications. The PHX6NA60E is supplied in the SOT186A full pack, isolated package. PINNING PIN 1 2 3 case gate drain source isolated DESCRIPTION SOT186A case 123 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDSS VDGR VGS ID IDM PD Tj, Tstg Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current Pulsed drain current Total dissipation Operating junction and storage temperature range CONDITIONS Tj = 25 C to 150C Tj = 25 C to 150C; RGS = 20 k Ths = 25 C; VGS = 10 V Ths = 100 C; VGS = 10 V Ths = 25 C Ths = 25 C MIN. - 55 MAX. 600 600 30 3.9 2.6 26 45 150 UNIT V V V A A A W C AVALANCHE ENERGY LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER EAS EAR IAS, IAR Single pulse avalanche energy Repetitive avalanche energy1 Avalanche current CONDITIONS Unclamped inductive load, ID = 6.5A; VDD 50 V; starting Tj = 25C; RGS = 50 ; VGS = 10 V MIN. MAX. 570 9.5 6.5 UNIT mJ mJ A 1 pulse width and repetition rate limited by Tj max. January 1998 1 Rev 1.000 Philips Semiconductors Objective specification PowerMOS transistors Low capacitance Avalanche energy rated ISOLATION LIMITING VALUE & CHARACTERISTIC Ths = 25 C unless otherwise specified SYMBOL Visol PARAMETER R.M.S. isolation voltage from all three terminals to external heatsink CONDITIONS f = 50-60 Hz; sinusoidal waveform; R.H. 65% ; clean and dustfree MIN. - PHX6NA60E TYP. MAX. 2500 UNIT V Cisol Capacitance from T2 to external f = 1 MHz heatsink - 10 - pF THERMAL RESISTANCES SYMBOL PARAMETER Rth j-hs Rth j-a Thermal resistance junction to heatsink Thermal resistance junction to ambient CONDITIONS with heatsink compound MIN. TYP. MAX. UNIT 60 2.78 K/W K/W ELECTRICAL CHARACTERISTICS Tj = 25 C unless otherwise specified SYMBOL PARAMETER Drain-source breakdown voltage V(BR)DSS / Drain-source breakdown Tj voltage temperature coefficient Drain-source on resistance RDS(ON) VGS(TO) Gate threshold voltage gfs Forward transconductance IDSS Drain-source leakage current IGSS Qg(tot) Qgs Qgd td(on) tr td(off) tf Ld Ls Ciss Coss Crss V(BR)DSS CONDITIONS VGS = 0 V; ID = 0.25 mA VDS = VGS; ID = 0.25 mA MIN. 600 2.0 3 TYP. MAX. UNIT 0.1 3.0 4.5 2 50 10 7 23 3.5 7.5 140 40 1.2 4.0 100 500 200 75 50 125 110 30 1550 V %/K V S A A nA nC nC nC ns ns ns ns nH nH pF pF pF VGS = 10 V; ID = 3.25 A VDS = VGS; ID = 0.25 mA VDS = 30 V; ID = 3.25 A VDS = 600 V; VGS = 0 V VDS = 480 V; VGS = 0 V; Tj = 125 C Gate-source leakage current VGS = 30 V; VDS = 0 V Total gate charge Gate-source charge Gate-drain (Miller) charge Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal source inductance Input capacitance Output capacitance Feedback capacitance ID = 6.5 A; VDD = 480 V; VGS = 10 V VDD = 300 V; RD = 56 ; RG = 9.1 Measured from drain lead to centre of die Measured from source lead to source bond pad VGS = 0 V; VDS = 25 V; f = 1 MHz January 1998 2 Rev 1.000 Philips Semiconductors Objective specification PowerMOS transistors Low capacitance Avalanche energy rated SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS Tj = 25 C unless otherwise specified SYMBOL PARAMETER IS ISM VSD trr Qrr Continuous source current (body diode) Pulsed source current (body diode) Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS Ths = 25C Ths = 25C IS = 6.5 A; VGS = 0 V IS = 6.5 A; VGS = 0 V; dI/dt = 100 A/s MIN. - PHX6NA60E TYP. MAX. UNIT 530 6.7 6.5 26 1.2 A A V ns C January 1998 3 Rev 1.000 Philips Semiconductors Objective specification PowerMOS transistors Low capacitance Avalanche energy rated MECHANICAL DATA Dimensions in mm Net Mass: 2 g 10.3 max 3.2 3.0 PHX6NA60E 4.6 max 2.9 max Recesses (2x) 2.5 0.8 max. depth 2.8 6.4 15.8 19 max. max. seating plane 15.8 max 3 max. not tinned 3 2.5 13.5 min. 1 0.4 M 2 3 1.0 (2x) 0.6 2.54 0.5 2.5 1.3 0.9 0.7 5.08 Fig.1. SOT186A; The seating plane is electrically isolated from all terminals. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for F-pack envelopes. 3. Epoxy meets UL94 V0 at 1/8". January 1998 4 Rev 1.000 Philips Semiconductors Objective specification PowerMOS transistors Low capacitance Avalanche energy rated DEFINITIONS Data sheet status Objective specification Product specification Limiting values PHX6NA60E This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. (c) Philips Electronics N.V. 1998 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. January 1998 5 Rev 1.000 |
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